This page is for documenting the (round-trip) latencies between data acquisition, availability of data on the host PC, and generating a response (in the simplest case just a trigger output).
Reducing the latency is one of the major points that we're trying to improve in order to enable better closed-loop experiments.
USB2.0
The round-trip latency (acq board to computer back to acq board) is around 20 ms—sufficient for a variety of experiments involving closed-loop feedback.
The main factor for the latency is the buffer size, bigger buffers mean higher mean and higher variance of latency.
This duration can be shortened by changing the size of the software buffer (down to approximately 10 ms, depending on processor speed).
To change the buffer size, click on the number of ms displayed in the status bar at the top (to the right of the CPU load bar) and change the 'audio buffer size'. At some point the latency benefit becomes very small and the cpu load increases for smaller buffers, so it is worth experimenting to find the optimal value.
USB3.0
...
However, I am not sure if perhaps I need to recompile the GUI using new headers to see any effect (that I did not try).
PCIe (future development)
We have plans to develop a PCIe aq.boards that should drop latencies to <1ms - paste updates here, and link relevant github etc. pages.
See here for in-depth information (soon).The documentation for the Open Ephys Acquisition board has been moved to: https://open-ephys.github.io/acq-board-docs/