add discussion of and links to all the standardized interfaces
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The current standard uses 2 MISO (headstage->computer) data lines, so it's possible to connect 2 headstages to one of the 4 inputs on the acquisition board via one cable by using a Y-adapter, or even 2x64 channel headstages for 128 channels over 12 wires.
For future expansions, it's possible to simply add more omnetics connector rows on the end of the connector.
For future expansions, it's possible to simply add more omnetics connector rows on the end of the connector.
TTL/event I/O & Analog I/O
We're using standard HDMI cables (ADD PIN MAPPING HERE)
Acquisition board <-> Computer: Intan Rhythm API
The Intan Rhythm interface consists of Verilog HDL code written for the Opal Kelly XEM6010 USB/FPGA interface module and a C++ API.
The modular hardware of the system allows easy expansion to include PCIE and USB3.0 interfaces with minimal changes to the software and no hardware changes other than replacing the FPGA module.
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Open Ephys Plugin architecture
In order to perform computations based on incoming data in real-time, just write your own process(buffer, events, nSamples) function.
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