This information is now maintained here: https://github.com/open-ephys/rhythm/blob/master/README.md
Ever since using Intan RHD chips, we've been using a modified version of Intan's Rhythm firmware and API to communicate with the headstages.
While the Open Ephys acquisition board mostly works with the standard intan firmware, there are a few subtle changes. (The Open Ephys software uses the standard intan API with some modifications and will work directly with the intan system and vice versa).
- the RGB status LEDs require a specific driver
- our analog in chips differ from those used by intan, so a different controller code needs to be used.
Here is a list of changes made on top of the firmware version 1.4 (26 February 2014) :
xem6010.ucf:
add the pin out for the LED string. All LEDs are driven by just one signal:
Background Color | ||
---|---|---|
| ||
# LED data out NET "LED_OUT" LOC="B14" | IOSTANDARD=LVCMOS33; |
main.v:
insert into module main #( in/output definitions :
Background Color | ||
---|---|---|
| ||
output wire LED_OUT |
Instantiate LED controller for the WS2812 string (see LED controller subpage for info on this module).
This code is still pretty much a place holder - add actually useful information and status display here.
...
color | #eee |
---|
...
ADC_input.v:
Instead of the Analog Devices AD7680 ADC used by intan, we're using the Texas Instruments DS8325 on our acquisition boards.
The usage of the chips is almost identical, but the data timing is a bit different, requiring a small edit in ADC_input.v - instead of populating the register from channel states 4-19, we're populating from 7-22. Everything else can stay the same.
...
color | #eee |
---|
...
8: begin
ADC_register[14] <= ADC_DOUT;
end
9: begin
ADC_register[13] <= ADC_DOUT;
end
10: begin
ADC_register[12] <= ADC_DOUT;
end
11: begin
ADC_register[11] <= ADC_DOUT;
end
12: begin
ADC_register[10] <= ADC_DOUT;
end
13: begin
ADC_register[9] <= ADC_DOUT;
end
14: begin
ADC_register[8] <= ADC_DOUT;
end
15: begin
ADC_register[7] <= ADC_DOUT;
end
16: begin
ADC_register[6] <= ADC_DOUT;
end
17: begin
ADC_register[5] <= ADC_DOUT;
end
18: begin
ADC_register[4] <= ADC_DOUT;
end
19: begin
ADC_register[3] <= ADC_DOUT;
end
20: begin
ADC_register[2] <= ADC_DOUT;
end
21: begin
ADC_register[1] <= ADC_DOUT;
end
...